Intelが最新のXeonスケーラブルなFPGAでAIにオールイン

Intelは、統合人工知能（AI）機能に再び賭け、AIに最適化されたFPGAと並んで、その第3世代のXeonスケーラブルプロセッサを本日発表しました。Intel is once again betting on integrated artificial intelligence (AI) capabilities, announcing today its third-generation Xeon Scalable processors alongside an AI-optimized FPGA. Integrated AI capabilities are nothing new for Intel. The chipmaker has been wrapping inference acceleration into its data center chips for years now beginning with its second-generation Xeon Scalable processors. With the release of its third-generation chips, however, Intel is taking AI acceleration to the next level, said Lisa Spelman, VP of Intel’s Data Platforms Group. “The Xeon Scalable processor is the foundation for artificial intelligence and for our portfolio, and it’s the only mainstream data center CPU on the market with integrated deep learning and acceleration,” she said. The chips are based on Intel’s new Cooper Lake microarchitecture, though they still rely on the chipmaker’s aging 14-nanometer manufacturing process. The key innovation in the company’s third-generation Scalable chips is support for the bfloat16 format within Intel DL Boost. “We’re offering the first mainstream processor with bfloat16 built-in,” said Spelman. Bfloat16 is a compact, numeric format that uses half the bits of the more common 32-bit floating-point calculation while achieving comparable accuracy. Bfloat16, however, isn’t unique to Intel, Spelman explained. Instead, it was developed with a larger industry focus in an effort to tackle the massive scope of AI workloads. She said that bfloat16 has become popular because it doesn’t require significant software customization to implement, effectively eliminating one of the biggest barriers to unlocking greater AI performance. According to Intel, these chips offer nearly twice the performance compared to the previous generation of four-socket capable chips. Intel’s Cooper Lake-based third-generation Scalable chips are designed specifically for use in multi-socket configurations. “This is the only current-generation x86 platform that offers that scalability up to eight sockets,” Spelman boasted. And launching alongside the new chips are a series of four- and eight-socket servers and motherboards from the likes of SuperMicro, Huawei, Lenovo, Gigabyte, Hyve, to name just a few. One- and two-socket designs will launch later this year with the release of Intel’s Ice Lake microarchitecture. A consolidated chip design, which will support configurations ranging from one to eight sockets, is slated for 2021. Also arriving next year is Intel’s Advanced Matrix Extensions (AMX). These extensions will increase the training and inference performance, while lowering the cost of ownership of Intel’s Xeon Scalable processors, Spelman explained. Intel plans to release an AMX specification later this month. In addition to the new Xeon Scalable chips, Intel also unveiled its first AI-focused FPGA, the Stratix 10 NX. According to Dave Moore, VP and general manager of Intel’s Programmable Solutions Group, the new FPGA was motivated by a desire to provide customers the right tool for their specific AI workload. The Stratix 10 NX features integrated high-bandwidth memory, high-speed networking interfaces, as well as newly developed AI-optimized arithmetic blocks that Intel is calling AI Tensor Blocks. These blocks contain dense arrays of lower-precision multipliers, typically used for AI modeling. Those Tensor Blocks can deliver up to 15-times higher performance in AI workloads than the previous generation of Intel FPGAs, Moore said. Intel says these features benefit high-bandwidth, latency-sensitive, and compute-heavy AI workloads such as natural language processing and fraud detection. According to Moor Insights and Strategy senior analyst Karl Freund, in an article contributed to Forbes, Intel’s new AI-focused FPGA is significant and should allow the company to compete with Xilinx’s Adaptive Compute Acceleration Platform (ACAP) architecture announced last year. However, Freund points out several distinct differences between the two company’s FPGAs. “While the Xilinx Versal ACAP provides a specific AI engine and integrated networking, among other networking functions, the Stratix 10 NX seems to offer a more incremental approach,” he writes. “It utilizes a computational Tensor Block and software to drive it for AI application.” Intel’s Stratix 10 NX is expected to launch sometime in the second half of 2020. Intel has steadily rolled out new AI features to its product line, albeit not always successfully. Earlier this year, Intel ditched its Nervana neural networking processors in favor of those from Habana Labs, which the chipmaker acquired in December. Since then, the company has been quiet on the progress of integrating Habana’s designs, stating only that it has begun sampling the first generation of inference and training processors to customers. It should be noted, however, that these chips were designed and announced prior to Intel’s acquisition. While expressing a desire for more details regarding progress made with Habana Lab’s technology, Freund said he was “encouraged to see Intel broaden its portfolio’s embrace of AI-specific features.”